Fitted with industry-leading, high-capacity, Virtex-6 LXT or Virtex-6 SXT FPGA family devices, the standard platform delivers both exceptional performance via 8-lane PCI Express(R) Gen 2 interface and 2-channel 1,066 Mbps DDR3 SDRAM SO-DIMM high-speed memory interfaces and rapid evaluation of wide-bandwidth and high-speed data transfer systems. TED developed these new domain platforms in accordance with the Targeted Design Platform concept promoted by Xilinx and are fitted with the industry-standard FPGA mezzanine card (FMC)*1 connector that provides flexible support for a range of different external interfaces implemented on FMC daughter cards available from TED today in addition to providing a future-proof upgrade path as new interfaces are developed. Thus preserving the initial investment in the base board purchase. Using the platforms in conjunction with the supplied reference designs facilitates a significant reduction in the development workload required of complex FPGA designs hosting high- performance PCI Express applications, application software and similar tasks, resulting in customer end products being brought to market more quickly. *1 FPGA mezzanine cards (FMC) comply with the VITA specification.
Release of PCI Express Gen 2 Evaluation Platforms with Virtex-6 FPGAs
Tokyo Electron Device Limited (TED) has announced the release of the inrevium* TB-6V-LX240T, LX365T, LX550T, and SX475T-PCIEXP series evaluation platforms fitted with Virtex(R)-6 FPGAs from Xilinx. The inrevium TB-6V-LX240T, LX365T, LX550T, and SX475T-PCIEXP make ideal evaluation platforms for the development of high-performance graphics engines for next-generation televisions and multi-function printers, or for the high-speed arithmetic processing found in high- performance computing applications.