The two companies collaborated to build and test an Altera Stratix V FPGA-based SyncE system design. The design implements Ethernet ports using the Altera 1G/10Gb Ethernet MAC core with the Altera 10GBASE-R PHY IP core and the Ethernet ports are synchronised by IDT’s 82P33731. Testing demonstrates that the design meets 10-40G Ethernet transmit jitter requirements and complies with ITU-T G.8262 option one and option two.
”Carrier Ethernet equipment synchronised by SyncE is used globally for the backhaul of wireless network traffic,” said Louise Gaulin, Vice President and General Manager, Network Communications Division, IDT. “As demonstrated by the joint test results, the Altera and IDT design provides a flexible and compliant SyncE solution optimised for high-performance carrier Ethernet equipment.”