The low power 40 nm CMOS architecture dissipates only 2.5 watts per port, delivering power savings of more than 35 percent as compared to previously available solutions. The BCM84790 features a space-saving 17x17mm BGA package specifically engineered to support CFP network applications. The BCM84793 features a 19x19mm BGA package with the ability to support 10-lane bi-directional transmissions at 10 Gbps each. This added flexibility ensures support for future-generation networking formats such as CFP2 and CXP.
Optimized for IT professionals who design and manage high-bandwidth data center and enterprise networks, the BCM84790 and BCM84793 gearbox PHYs have the ability to multiplex and demultiplex data across four 25 Gbps channels to (or from) ten 10Gbps channels. Both devices can also be configured to support four bi-directional lanes at 10Gbps for 40GbE repeater applications, support Ethernet and optical transport networking, and are compliant with the IEEE 802.3ba standard for 100GbE and ITU OTL 4.4 signaling.
Key Features:
•Supports Ethernet and optical transport networking (OTN)
•100GbE/OTN VSR28 to CAUI interface
•Less than 200 femtoseconds (fs) root mean square (rms) of random jitter on the 25Gbps transmit outputs
•High-speed eye monitoring diagnostics on all data I/O
•Integrated clean-up phase lock loop (PLL) reduces bill of material cost
•Single REFCLK (reference clock) input
•Low latency architecture
The BCM84790 and BCM84793 are sampling now. Production release is scheduled for the second half of 2012.