Molex unveils chip-to-chip 224G product portfolio
Molex has introduced a chip-to-chip 224G product portfolio, encompassing next-gen cables, backplanes, board-to-board connectors, and near-ASIC connector-to-cable solutions operating at speeds up to 224 Gbps-PAM4.
As a result, Molex is uniquely positioned to meet heightened demands for the fastest available data rates powering advanced technology including generative AI, ML, 1.6T networking and other high-speed applications.
“Molex is collaborating closely with major technology innovators, as well as key data centre and enterprise customers, to set an aggressive pace for 224G product introductions,” said Jairo Guerrero, VP & GM, Copper Solutions, at Molex. “Our transparent, co-development approach facilitates early engagement with stakeholders across the 224G ecosystem to identify and resolve potential performance bottlenecks and design challenges, ranging from signal integrity and EMI reduction to the need for more efficient thermal management.”
Connectivity innovations empower the 224G ecosystem
Entirely new system architectures with multiple chip-to-chip connection schemes will be required to achieve data rates up to 224 Gbps-PAM4, which represents an important yet complex technology inflexion point. To that end, a cross-functional, global team of Molex engineers collaborated closely with customers, technology leaders and suppliers, using the latest predictive analytics and advanced software simulations, to speed the design and development of a full portfolio of best-in-class solutions, including:
- Mirror Mezz Enhanced—an addition to the Mirror Mezz family of genderless mezzanine board-to-board connectors, this product supports 224 Gbps-PAM4 speeds while addressing varying height requirements and PCB space constraints, as well as manufacturing and assembly challenges, to lower application costs and time to market.
- Mirror Mezz Enhanced extends the capabilities of Mirror Mezz and Mirror Mezz Pro, which were selected as the Open Accelerator Mo (OAM) standard by the Open Accelerator Infrastructure Group, a subgroup of the Open Compute Project (OCP). This designation reinforces Molex’s overarching commitment to work with industry leaders in supporting the explosive growth of AI and other accelerator infrastructure systems.
- Inception—the first Molex genderless backplane system designed from a cable-first perspective, delivering greater application flexibility from the outset and featuring variable pitch densities, optimal signal integrity, along with simplified integration with multiple system architectures. The simplified SMT launch reduces the need for complicated board drill and via processing at the PCB interface. The multiple wire gauge options can be partnered with custom lengths both internal and external to the application for optimised channel performance.
- CX2 Dual Speed—Molex’s 224 Gbps-PAM4 near-ASIC connector-to-cable system offers robust, reliable performance with the benefits of screw engagement after mating, an integrated strain-relief feature, a reliable mechanical wipe and a fully protected ‘thumb-proof’ mating interface to ensure long-term reliability. High-performance twinax and an innovative shielding structure provide superior Tx/Rx isolation.
- OSFP 1600 Solutions—These I/O products include SMT connector & cage, BiPass, along with Direct Attach (DAC) and Active Electrical Cable (AEC) solutions built for 224 Gbps-PAM4 per lane or aggregate speed of 1.6T per connector. Improved shielding minimises crosstalk while increasing signal integrity at a higher Nyquist frequency. These latest connector and cable solutions have been engineered to elevate mechanical robustness and durability.
- QSFP 800 & QSFP-DD 1600 Solutions—This product line also has been upgraded to provide SMT connector & cage, BiPass, along with DAC and AEC solutions built for 224 Gbps-PAM4 per lane or aggregate speed of 1.6T per connector. Molex’s QSFP and QSFP-DD solutions ensure mechanical robustness, improved signal integrity, reduced thermal load, design flexibility and decreased rack costs.