MIPS, the chip design company owned by GlobalFoundries, has launched a new processor architecture designed to manage real-time data movement for emerging artificial intelligence systems operating outside traditional datacentres.
The MIPS I8500, unveiled at GlobalFoundries’ Technology Summit in Munich, is the company’s third-generation, four-thread-per-core processor built on the open RISC-V instruction set architecture. The processor is now sampling with lead customers and is aimed at hyperscale, automotive, industrial, storage, and communications infrastructure markets.
The company describes the I8500 as a data orchestration processor for “Physical AI” – systems that bring AI capabilities to physical environments, such as factories, vehicles, and Edge computing networks.
“As AI moves beyond the datacentre into physical environments, platforms require real-time data orchestration capabilities far beyond what traditional processors can deliver,” said Sameer Wasson, Chief Executive of MIPS. “The I8500 marks the evolution of our proven data movement architecture into the open RISC-V era, delivering performance, efficiency, and design freedom for next-generation Physical AI solutions.”
The I8500 features a scalable, multithreaded architecture supporting up to 24 threads per cluster across multi-core configurations. It delivers low-latency and deterministic data handling, with integrated security features to support secure packet routing and communication between accelerators, compute blocks, and networks.
The chip’s design is optimised for energy efficiency and supports both Linux and real-time operating systems, aligning it with the RISC-V RVA23 software ecosystem.
Industry analysts have welcomed the move as timely. “The combination of scalable multithreading, deterministic performance, and secure data orchestration directly addresses the growing demand for real-time, event-driven processing in markets like automotive, industrial automation, and communications infrastructure,” said Steven Dickens, Chief Executive and Founder of HyperFRAME Research. “MIPS is clearly positioning itself as a leader in enabling Physical AI at the silicon level.”
Potential applications for the I8500 include high-speed packet processing for smart network interface cards and data processing units, real-time industrial automation, and secure Edge computing for predictive maintenance and diagnostics. Its architecture is designed to scale across 5G and 6G edge environments, supporting dynamic traffic management, encryption, and quality-of-service controls.
MIPS is offering early access to its Atlas Explorer Core Model for software-hardware co-design, allowing customers to shorten development cycles. The company will showcase the processor at the RISC-V Summit North America on 22nd–23rd October.
