ASMPT and IBM Research collaborate on AI chip technology
With the dawn of the Artificial Intelligence (AI) era upon the world, the usual playbook of continuous shrinking and packing more and more transistors into chipsets will become unsustainable. New AI chip architecture, materials and manufacturing processes will be needed, in order to meet the requirements and realise the potential of the AI-enabled world.
ASMPT will provide a suite of Integrated Solutions for Heterogeneous Integration (including ALSI Laser Saw/Grooving and interconnect tools, inclusive of collaboration on next generation hybrid bonding) in support of IBM AI Research.
Dr Mukesh Khare, Vice President, Systems Research at IBM Research, said: “The future of AI computing performance depends on the development of hardware that meets the fast-growing demands of emerging AI workloads. We are pleased to work with ASMPT to advance packaging and Heterogeneous Integration solutions for AI hardware research in the IBM Research AI Hardware Center.”
Lim Choon Khoon, Senior Vice President at ASMPT, added: “The exponential cost of recent silicon scaling has created an inflection point for the industry. It is driving the development of Heterogeneous Integration (HI) to augment step up performance versus comparable Systems on Chip (SoC). This is being achieved through HI's ‘open’ capability to dis-integrate and re-integrate silicon and chiplets, allowing flexible choices to achieve optimal performance at significantly lower costs.
“The timely confluence between IBM’s Heterogeneous Integration roadmap and ASMPT’s advanced packaging technologies and tools makes us natural strategic collaboration partners to tap the massive potential for innovation and better performance in semiconductor solutions.”
Finally, ASMPT is both excited and privileged to be among the companies driving the effort of developing the next generation AI chip technology with world renowned industry leaders like IBM.