News & Analysis

Launch of project to address semiconductor tech

25th June 2024
Caitlin Gittins

CEA-Leti is delighted to announce the inaugural meeting today of the FAMES Pilot Line, a project designed to propel semiconductor technologies in Europe forward. 

This project is in line with the objectives of the EU Chips Act, which aims to enhance EU semiconductor capabilities and ensure technological independence.

The pilot line will focus on developing five new technology sets:

  • FD-SOI (featuring advanced generation nodes at 10nm and 7nm)
  • Various embedded non-volatile memories (including OxRAM, FeRAM, MRAM, and FeFETs)
  • Radio-frequency components (such as switches, filters, and capacitors)
  • Two 3D integration methods (heterogeneous and sequential integration)
  • Small inductors for the creation of DC-DC converters used in Power Management Integrated Circuits (PMIC)

Originating from CEA-Leti, FD-SOI is a planar CMOS technology recognised for its optimal PPAC-E (Performance, Power, Area, Cost and Environmental impact), particularly suitable for circuits that integrate digital, analogue, and radio-frequency elements. FD-SOI is favoured by global semiconductor leaders due to its precise electrostatic control at the transistor level and its suitability for cutting-edge power-management technologies.

With the market for FD-SOI growing rapidly, there is considerable anticipation for the forthcoming 10nm and 7nm nodes. Over 43 entities across the electronic-systems value chain, including material providers, equipment manufacturers, fabless companies, EDAs, IDMs, system houses, and end-users from sectors such as ICT, automotive, medical devices, and space and security, have pledged their support for the FAMES initiative, heralding the formation of a dynamic ecosystem of start-ups, SMEs, and major industry players.

Jean-René Lèquepeys, CTO of CEA-Leti, stated, “The FAMES Pilot Line, by integrating a suite of advanced technologies, will facilitate revolutionary system-on-chip designs and enable smarter, more sustainable, and efficient solutions for next-generation chips. The project is particularly focused on addressing the sustainability challenges within the semiconductor sector.”

“By integrating and combining a set of cutting-edge technologies, the FAMES Pilot Line will open the door to disruptive system-on-chip architectures and provide smarter, greener and more efficient solutions for future chips. The FAMES project will indeed pay special attention to semiconductor sustainability challenges,” said Jean-René Lèquepeys, CTO of CEA-Leti.

The FAMES Consortium is composed of an array of partners; the coordinating body, CEA-Leti (France), along with imec (Belgium), Fraunhofer Mikroelektronik (Germany), Tyndall (Ireland), VTT (Finland), CEZAMAT WUT (Poland), UCLouvain (Belgium), Silicon Austria Labs (Austria), SiNANO Institute (France), Grenoble INP-UGA (France), and the University of Granada (Spain).

The five innovative technologies will open market opportunities for low-power microcontrollers, multi-processor units, advanced AI and machine learning devices, smart data-fusion processors, RF devices, chips for 5G/6G and automotive markets, smart sensors and imagers, trusted chips, and new components for space applications.

The pilot line will be open to all EU stakeholders, including universities, RTOs, SMEs, and industrial companies, as well as interested parties from allied countries, through annual open calls and on a request basis, adhering to a fair and impartial selection process.

Funding for the project will be evenly split between participating member states and the Chips JU.

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