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High-speed digital symposium tour explores design through verification

4th April 2014
Nat Bowers

Conducted in 10 cities across Europe, from May 20th through to July 3rd, Agilent Technologies has announced a European symposium tour focused on high-speed digital design and test topics. The full-day technology symposium for engineers and project managers is complimentary and will feature presentations from some of the leading providers of FPGA and memory devices.

Topics will include design and verification of electronic systems involving complex PCBs with high-speed interconnects such as PCIe, USB, MIPI, HDMI and DDR memory designs. Participants will also hear from industry leaders about practical examples and their experience in adopting a PCB-level SI closure strategy. Signal integrity will be a central topic of the symposium, including ways to identify influencing parameters, how to get them under control, and finally benefit by having a more efficient development cycle.

A common challenge in modern design is to reduce and control the cost of prototype development while under pressure to meet time-to-market goals. This challenge often is combined with design optimisation goals to meet higher robustness for volume production, lower power-consumption targets, and higher data rates. For engineers to be successful in high-speed design, all of these requirements need to be optimised.

Agilent’s High Speed Digital solutions include a range of simulation and measurement tools that help users cut through the challenges of gigabit digital designs. They help engineers and project managers visualise and address signal integrity issues in design. The tools also help them understand the SI contributions of their measurement system in order to choose the right tools to gain confidence in meeting design goals.

Learn more about schedule, locations and to register for the complimentary symposium at

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