At embedded world 2026, on the DigiKey booth, Paige Hookway speaks with Ian Saturley, Associate Director Marketing – Networking & Connectivity Solutions at Microchip Technology, about wired Ethernet.
The industrial connectivity landscape is undergoing a notable transformation — and few companies have had a front-row seat to that evolution quite like Microchip Technology.
Three decades of industrial connectivity
Saturley brings a perspective that spans nearly 30 years in the networking and connectivity space. From industrial PC-dominated architectures of the past to today’s virtualised, multi-platform environments, Microchip has had to evolve while simultaneously honouring legacy requirements. As Saturley explains, the market has “a fast rate of change on one hand but on the other hand has to be able to deliver the interfaces from the past.” That dual pressure of innovation alongside continuity is something that defines the challenge for vendors and designers alike.
PCIe connectivity in the modern industrial stack
One of the key themes at Microchip’s showcase this year is the evolution of PCIe-based connectivity fabrics. As industrial platforms increasingly rely on virtual machines sharing resources, getting data into system memory quickly has become paramount. Saturley points to features such as Precision Time Protocol (PTP) in networking and precision time measurement in PCIe as examples of what customers are actively requesting. Rather than simply chasing faster link speeds, Microchip is focusing on protocol-level improvements: power saving and coherence are, in Saturley’s words, “the novel features that are really making a difference now.”
TSN: determinism, redundancy, and hardware offload
Time-Sensitive Networking (TSN) continues to gain significant traction, and Microchip has been tracking its development from the very beginning. For industrial customers, TSN delivers on three critical fronts: time awareness, low latency, and network resilience. “Just accept things will break, but that can’t stop the factory from working.”
Saturley notes that the network fabric must deliver that resilience, and Microchip’s approach is to achieve it through hardware offload, which operates far more quickly and coherently than software alternatives. Microchip actively pursues standards compliance and certification, including interoperability testing at facilities such as the University of New Hampshire, ensuring customers receive a low-risk, fast route to market.
Single Pair Ethernet: a broad portfolio for industry and automotive
The company’s Single Pair Ethernet (SPE) portfolio now ranges from 10 Megabit solutions (10BASE-T1S) through to Gigabit and beyond, covering both bus topologies and point-to-point links. A key differentiator, Saturley explains, is providing a digital demarcation ahead of the physical layer, which gives customers greater flexibility to build more creative and innovative end solutions.
Reducing design risk through software and collaboration
A recurring theme across all these technologies is Microchip’s commitment to reducing design risk for customers who may not have access to the specialised test equipment that silicon manufacturers routinely use. One standout example is the virtual eye diagram feature now available in Microchip’s software, which Saturley describes as “a real game-changer” for embedded designers who cannot directly probe a board. Combined with the practice of inviting customers to share their schematics early, Microchip is able to flag common design pitfalls before they become costly iterations.
Looking ahead
As containers and virtual machines proliferate across industrial hosts, the demand for peripherals that work seamlessly within those environments will only intensify.
Microchip’s roadmap has been created to give designers a “pain-free path” into SPE, advancing PCIe with features relevant to today’s architectures, and continuing to broaden standards compliance across the entire portfolio.
Watch the full conversation here.
