News & Analysis

Developing nano-metrology solutions for manufacturing

23rd March 2020
Lanna Deamer

Park Systems and imec have signed the 2nd Joint Development Project (JDP) within four years to increase the development efforts for future generation in-line AFM metrology solutions. 

The official signing ceremony took place on 17th February, 2020, at imec’s headquarters in Leuven, Belgium.

The new JDP extends the collaboration to explore new frontiers of AFM metrology solutions for the wafer semiconductor sector. As enhanced possibilities of inline automated AFM in semiconductor research, such as surface roughness, Critical Dimension (CD) and sidewall roughness, have been successfully explored in the first JDP, the second JDP targets multiple strategic developments to address the current metrological challenges of continuously downscaling the geometrical dimensions of devices and 3D assembly stacking.

“Collaboration with leading research centers such as imec is crucial for us to deliver the best technological solutions addressing the needs of research and industrial markets. I am very glad to partner with imec on this mission again, and I look forward to a fruitful further cooperation,” commented Dr. Sang-il Park, CEO of Park Systems.

“Park Systems has grown a lot in the past years, which is definitely helpful also for our joint development efforts with Park. The new joint development project that we have just signed showcases the best and beautiful collaboration we have together,” added Kristof Paredis, R&D Manager from imec.

After signing the first JDP in 2015 Park Systems officially joined imec’s Industrial Affiliation Program (IIAP) and became a member of IIAP. Ever since then, the interdisciplinary team of Park’s and imec’s researchers and engineers follow the goal to develop new protocols designed to increase production yield and device performance for the semiconductor industry.

With a strong focus on practical problem solving applications of the new JDP, the partners aim to deliver innovative 3D-Metrology features for market challenges of ever smaller semiconductor devices.

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