Cyrient and MIPS partner

The partnership will focus on enabling real-time, safety-critical applications, power delivery, and compute efficiency in demanding platforms for automotive, industrial, and data centre markets. Motor control and data centre power delivery are key platforms to leverage Cyient’s Analog Mixed Signal capabilities and MIPS Atlas CPU IP.

“As compute systems scale from Cloud to the Edge, intelligent power delivery is emerging as a key enabler of performance and efficiency,” said Suman Narayan, CEO of Cyient Semiconductors. “Our collaboration with MIPS allows us to bring together embedded intelligence and advanced power architectures in custom silicon platforms built on a scalable, open foundation. Together, we are designing tomorrow’s semiconductors — purpose-built for a more connected and power-efficient world.”

“The problem of power efficiency and motor control are both real-time compute workloads for which MIPS M8500 microcontrollers are the optimal choice,” said Sameer Wasson, CEO of MIPS. “Building around our best-in-class real-time and control-loop performance and efficiency, Cyient can bring their unique capability in intelligent power delivery into custom ASIC and ASSP designs to build differentiated solutions that meet our customers unique needs in their target markets.”

Demand for software defined vehicles, data centre infrastructure, and industrial automation is driving growth for custom silicon. Customers can build advanced, differentiated solutions that are easy to programme using MIPS advanced processor IP, based on the open RISC-V instruction set architecture, combined with Cyient's expertise in intelligent power and mixed-signal design.

Targeted applications include motor drive control, intelligent power management, power delivery management, and safety-critical applications, offered as ASSP or ASIC platforms. OEMs and system integrators will benefit from faster time-to-market, avoiding proprietary lock-ins, and optimised platform cost.