Xilinx Virtex-7 HT Devices Enable 100-400Gbps Applications and Beyond in a Single FPGA for Next Generation Communication Systems

Industry expectations for global IP traffic to approach 64 exabytes per month from today's roughly 15 exabytes per month* is fueling the need for higher bandwidth system-on-chip solutions capable of driving high-speed signals with superior signal integrity and low-power efficiency for deployment over fiber optic and other existing infrastructures, said Linley Group Senior Analyst Joseph Byrne. As the communications industry increases interface speed from 10Gbps to 100Gbps to provide more capacity, requirements for chip-to-optics, chip-to-backplane, and chip-to-chip interfaces become extremely stringent. As such, Xilinx has put a keen focus balancing power, performance, optical jitter constraints and integration in delivering 28Gbps transceivers with its Virtex-7 HT devices.

Built with four to sixteen 28Gbps transceivers complying with OIF CEI-28G, the Optical Internetworking Forum's Common Electrical I/O specification for 28Gbps, Virtex-7 HT devices are designed to interface to next generation CFP2 and QSFP2 optical modules that will be used in next generation 100 - 400Gbps system line cards. The devices also have up to seventy-two 13.1Gbps transceivers and can offer up to 2.8Tbps full duplex throughput. This extends the Virtex-7 family's total system performance, with 2x the logic capacity, 1.3x greater memory bandwidth, 2x better static power efficiency, and now 2.7x higher bandwidth over comparable competing devices.

In order to meet the growing market demand for bandwidth, we expect communication equipment vendors will design next-generation 100 and 400Gbps systems using the emerging CFP2 optical module form factor. This will maximize face plate bandwidth densities while improving existing form factor power dissipation budgets, said Christian Urricariet, director of marketing for high-speed optics at Finisar. Our work with Xilinx shows that their low jitter single-chip solution enables a more simplified approach to implementing these higher port densities by providing a direct 28Gbps connection between the FPGA and the CFP2 module.

The devices' feature mix allows for a wide range of applications, from low-cost 100G smart gearbox chips with 290,000 logic cells to the world's first 400Gbps FPGA with 870,000 logic cells including applications from 100Gbps, 2 x 100Gbps or 400Gbps interfaces, and efficient connectivity to legacy system side interfaces based on 3Gbps or 6Gbps as well as 10Gbps ASICs and ASSPs. This means Virtex-7 HT FPGAs can be used in applications such as 100Gbps line cards supporting OTU-4 (Optical Transfer Unit) transponders, muxponders or SAR (Service Aggregation Router), lower cost 120Gbps packet processing line cards for high demanding data processing, multiple 100G Ethernet ports bridges, 400Gbps Ethernet line cards, base stations and remote radio heads with 19.6Gbps CPRI (Common Public Radio Interface) requirements, and 100Gbps and 400Gbps test equipment.

Our customers are seeing the demand for more bandwidth grow at an astonishing rate and we've worked closely with them to provide an industry-leading 28Gbps transceiver solution for our Virtex-7 HT FPGA that will enable them to successfully design their next generation systems, said Krishna Rangasayee, Corporate Vice President and General Manager of Xilinx's Communications Business Unit. The new devices will allow communication equipment developers to accelerate their time to market while giving them the flexibility to quickly respond to evolving market conditions, requirements and standards.