Designers using an Xtensa 8 DPU can select from an expanded library of pre-verified configuration options to get the exact functionality they need. Enhancements in this new generation processor include pairs of 32-bit GPIO (general purpose input/outputs) and 32-bit Queue interfaces for direct connection to RTL (register transfer level) blocks, and a low-area, double-precision floating point accelerator.
Xtensa 8 continues our tradition of providing the unique capabilities designers require for dataplane applications, stated Steve Roddy, Tensilica’s vice president of marketing and business development. The Xtensa 8 processor’s tiny size and low power consumption makes it ideal for high-volume SOC products in a wide range of applications including mobile phones and other portable electronic devices, digital TV, broadband set-top boxes, computer, storage, networking and communications equipment. With the tiny size of these DPUs, modern, low-cost SOCs for these markets routinely include a dozen or more programmable controllers and DPUs on one chip.
Tensilica’s previous generation Xtensa processors have been licensed by over 160 companies, including five of the top 10 semiconductor companies. These DPUs have been customized and used as controllers as well as for complex functions such as communications DSPs (digital signal processors), audio, video, graphics, printers, and packet processing.