Analysis

SPiDCOM chooses Toshiba ASIC and mixed-signal IP technology for dual-core HomePlug AV SoC

9th June 2010
ES Admin
SPiDCOM Technologies, the French fabless semiconductor company specializing in integrated circuits and Linux-based software bundles for Multimedia Home Networking, has used Toshiba’s 90nm CMOS ASIC platform, mixed-signal IP and European technical support services to develop its first HomePlug AV system-on-chip (SoC).
SPiDCOM’s new SPC3XX family ‘No Limits’ HomePlug AV powerline communications IC provides a fully integrated, single-chip solution for applications that use powerline communications for the distribution of ‘triple-play’ services throughout the home. Supplied in a 265-pin PBGA package, the SPC300 is built on Toshiba’s TC300 90nm ASIC technology and combines an open dual-core architecture with a variety of multimedia and general-purpose interfaces.

SPiDCOM and engineers at Toshiba Electronics Europe’s ELDEC (European LSI Design and Engineering Centre) facility in Düsseldorf worked together in the development of the new SoC. Key elements of the design include the implementation of an embedded ARM926EJ-S™ core capable of running at 300MHz and the seamless integration of mixed-signal IP blocks for the management of features such as power-on-reset (PoR) and innovative spread spectrum clock generation (SSCG).

Toshiba’s ELDEC team also took responsibility for extensive testing of the chip design. A boundary scan JTAG controller was inserted to allow for control and observation of special cell tests for PoR, PLL and spread spectrum clock generation. Transition delay testing using on-chip clocking, high-speed memory BIST analysis and test pattern generation were also handled by Toshiba.

SPiDCOM’s dual-core HomePlug AV IC uses its first processor to handle physical layer management and other real-time requirements and the ARM926EJ-S core for application-specific processing. The IC integrates a 10/100/1000 Ethernet MAC, an RMII/MII/GMII PHY interface and multimedia connectivity such as PCM, I2S, and MPEG-TS. General purpose interfaces include UART, SPI and support for 8-bit parallel connections. A low-power standby mode minimises power consumption, while the open architecture based on LINUX v2.6 supports innovative and low-cost customer development.

“SPiDCOM found in Toshiba the right partner to support its new generation development. Local engineering support for SoC design and test has been highly appreciated by our technical team and significantly speeded the development of the SPC3XX ‘No Limits’ HomePlug AV IC family,” comments Frederic Onado, SPiDCOM Technologies COO. “The result is an advanced SoC solution that meets the performance requirements of our customers and allows them to create innovative solutions with less complexity and lower cost.”

Eugen Pfumfel, the manager for ASIC and Foundry business development at Toshiba Electronics Europe adds: “Our work with SPiDCOM is further evidence of how an IDM model built on advanced processes, innovative IP and a strong local engineering support infrastructure can deliver the optimum solution for Europe’s fabless semiconductor companies.”

The TEE ASIC & Foundry Business Unit’s open and advanced Integrated Device Manufacturer (IDM) model allows customers to speed development and reduce risk by choosing a single partner for design, implementation, production and full-service supply chain management. The company offers a wide range of leading edge CMOS solutions based on Toshiba’s own process developments. Customised SoC development is supported through a broad lineup of Intellectual Property (IP), including in-house and third party analogue and digital IP, ARM processors and embedded memory options.

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