Testers were struggling to keep up with Moore’s Law by integrating more channels, power supplies and analog resources per board. DFT and adaptive test are driving to shorter test times. Memory testers currently can test 256/512 devices in parallel, enabled by highly parallel handling capability. What is the future path of SOC/Sensor test? Test systems can integrate to follow Moore’s Law. Testers are getting more compact (CTH from Teradyne and Verigy/Advantest).
This paper will provide a mechanical handling solution for testing non-memory devices with high parallelism (144 – 300 devices in parallel). Also, it will provide a solution for testing highly parallel sensors. Sensors have become ubiquitous in consumer (Smartphone, GPS, gaming…), automotive (TPMS, airbags, stability control…) and industrial applications. These devices (accelerometers, gyro, pressure, magnet/compass, microphone…) also currently require various stimuli to test.
The presentation will propose a single insertion solution for 9 DOF sensor test (3 axis accelerometer, 3 axis gyro, 3 axis compass). Additionally, Mr. Lorenz will discuss the requirements for 3-D partial stack test. The presentation will be supplemented with hardware samples that can be passed to the audience for close examination.
Bernhard Lorenz studied mechanical engineering at the Technical University in Munich. After serving as VP of R&D in a medical equipment company, he joined Multitest in 2007 as Business Unit Manager. In 2009, Lorenz took over the responsibility of all handler engineering and became a member of the Multitest Board.