How AI is revolutionising advanced packaging
Data centres and HPC servers are expected to grow gradually in the next years. Both applications are strongly driven by AI. Although the traditional server and networking markets have been weak during 2024, AI servers are growing strongly.
Analysts at Yole Group recognise a significant opportunity for the growth and adoption of 2.5D/3D packaging technologies. High-end performance packages with 2.5D/3D approaches are used today to package AI processors like GPUs and AI ASICs, as well as HBM.
Rayane Mazari, Technology & Cost Analyst, Semiconductor Packaging from Yole Group, explains: “There is an increased implementation of high-end systems in high-performance computing, networking, artificial intelligence, autonomous driving, personal computing, and gaming. Therefore, 2.5D & 3D advanced packaging platforms have become critical and effective for increasing device performance and bandwidth.”
The slowing down of scaling methods, along with diversifying demands for high performance and a smaller footprint package, has pushed designers to adopt advanced packaging solutions to achieve high-performance needs. 2.5D & 3D packaging solutions are becoming increasingly complex, and more players have entered the market to enhance their products’ performance. Escalating demand for enhanced performance with ultra-high routing has been achieved by heterogeneous integration, hence the adoption of 2.5D & 3D packaging technologies.
NVIDIA, AMD, and Apple entered the market with products using innovative packaging solutions thanks to their collaboration with TSMC, and Yole Group decided to investigate and compare them. The new reverse engineering and costing report, 2.5D & 3D Packaging Comparison 2025, investigates three major components developed by these leading players and especially the 2.5D/3D packaging structure:
- NVIDIA H100: this component uses a 2.5D CoWoS platform to stack the 80GB HBM2E (3D package) and the GPU die on the silicon interposer.
- AMD Radeon RX 7900 XTX: AMD’s solution is based on chiplet integration. The processor and MCDs are connected by an extreme bandwidth Infinity Fabric Fanout interconnect, which enables 5.3 TB/s of bandwidth between the processor and MCDs, leveraging an InFo OS packaging solution from TSMC.
Apple M2 ultra features UltraFusion technology, realised by a chip-first / RDL-last process flow. “This technical choice leads to the conclusion that the Apple M2 Ultra uses TSMC InFO-LSI to enable two processor dies to communicate by a silicon bridge (LSI),” comments Rayane Mazari.
Yole Group has developed a proprietary reverse engineering and costing methodology structured around three key steps: physical analysis and comparison, identification and examination of the manufacturing process flow, and, finally, manufacturing cost analysis. In this comparative reverse engineering and costing report, Yole Group’s analysts provide an in-depth analysis of the technical decisions made by AMD, NVIDIA, and Apple, highlighting their effects on performance and manufacturing costs.
Stefan Chitoraga, Technology & Market Analyst, Semiconductor Packaging: “Advanced packaging increases chip area integration per component. However, integrating more chips into a single package leads to higher component costs.”
Yole Group has investigated the advanced packaging industry for some time with a dedicated collection of products. Leveraging market expertise and technical insight, Yole Group’s experts share their vision of the industry and examine the strategies of leading advanced packaging players.
High-performance packaging, highlighted in the 2024 report (with the 2025 edition coming soon), remains a key segment driven by innovative 2.5D and 3D platforms: this advanced packaging market segment is expected to reach $28 billion by 2029 at a 37% CAGR between 2023 and 2029. These advanced packaging solutions push performance boundaries and play a crucial role in accelerating the AI revolution.