Toshiba’s new IC supports the H.264 video decode: high profile @ level 4.1 and the VC-1: advanced profile @ level 3. The decoders take the video MPEG TS packet stream from the companion IC and return the decoded video data along with clock and vertical/horizontal synchronisation information. A PCI controller and a 33.3MHz PCI interface provide for the communication of command and control signals with the companion IC.
The TC90490XBG is based on a dual bus architecture and features an integral DMA controller and clock generators. A built-in DRAM controller supports a 32-bit, 200MHz connection to external DDR-SDRAM.
Supplied in a PFBGA 265 package (Size: 15mm x 15mm x 0.8mm), the new IC operates with a 1.3V supply for core logic, a 2.6V supply for DRAM I/F, and a 3.3V supply for the standard I/O.