Gary Meyers Named to Oasys Design Systems’ Board of Directors

“We’re delighted to welcome Gary Meyers to our board,” says Paul van Besouw, Oasys’ president and chief executive officer (CEO). “His experience, skill set and understanding of the synthesis market are unparalleled. Gary’s input will be invaluable as we move into the next phase of our business.”

Mr. Meyers joins the board composed of Joe Costello, chairman and CEO of Orb Networks and former CEO of Cadence Design Systems, Larry Yoshida, Premier Technologies chairman and CEO, and Oasys co-founders Paul van Besouw and Johnson Limqueco, vice president of R&D. He also is a member of the board of directors of Exar Corporation, a semiconductor firm serving the datacom, storage, consumer and industrial markets, and served on the board of SpiraTech, Ltd, prior to its acquisition by Mentor Graphics.
Formerly president and CEO of Synplicity, the leading supplier of FPGA synthesis software and ASIC prototyping systems acquired by Synopsys Inc. in 2008, Mr. Meyers mostly recently served as a Synopsys vice president and general manager. Previously, he was vice president of worldwide sales at Synplicity from 1998-2004, and held senior sales and marketing director roles at LSI Corporation.

Mr. Meyers holds a Bachelor of Science degree in Electrical Engineering from the University of Maryland in College Park, Md., and an MBA from the University of California at Los Angeles.

“Oasys Design Systems is the most exciting synthesis entrant in years and is shaking up the field in a way we haven’t seen since logic synthesis in the late 1980s,” notes Meyers. “Its RealTime Designer is giving early adopters an unmistakable competitive advantage. I’m very excited to join this innovative team.”
RealTime Designer™ is the first design tool for physical register transfer level (RTL) synthesis of 100-million gate designs. It features a unique RTL placement approach that eliminates unending design closure iterations between synthesis and layout.