They occupy large spaces and necessitate sophisticated cooling mechanisms to sustain the required performance levels. The proposed new DoC design consists of thousands of cores that communicate via a new communication infrastructure, while provisioning the system resources for the necessary power, performance, and thermal trade-offs.
From an intellectual perspective, this approach lies squarely at the intersection of two major trends in integrated systems design, namely low power and communication centric design.
“There are three goals in this project,” explains Radu Marculescu. “We want to design small-world wireless architecture as a communication backbone for many core-enabled Wireless Datacenter on Chip (WiDoC), while establishing physical layer design methods for highly-integrated 3D WiDoC suitable for low latency data communication.”
“We hope to evaluate latency-power-thermal trade-offs for the proposed WiDoC platform by considering relevant big data applications.”
The unique proposed research brings together highly novel and interdisciplinary concepts from network-on-chip (NoC), wireless and complex networks, communication circuits, and optimisation techniques aimed at single chip solutions for achieving data center-scale performance.
At the same time, this work will help to establish an interdisciplinary research-based curriculum for high performance many-core system design meant to increase the number of students attracted to this area of engineering.
