Carbon Design Systems Announces Performance, Power Analysis in TSMC Reference Flow 11.0

“We are pleased to introduce Carbon Design System’s Carbon Model Studio and SoC Designer Plus to TSMC Reference Flow 11,” says ST Juang, senior director of Design Infrastructure Marketing at TSMC. “The Carbon tools will help our customers make the proper power and performance trade-offs early in the design flow, thereby reducing design cycle time and creating more confidence before going into fabrication.”



SoC Designer Plus enables users to create a complete virtual platform that they can use to:

• Create and simulate system-on chip (SoC) systems representing all of the hardware and software components in the system

• Generate and characterize performance and profile information in a realistic environment running real software

• Generate real power profiles and power state data for TSMC power performance and area (PPA) models for all of the hardware components in the system

• Validate embedded software and firmware against the hardware models



Carbon Model Studio enables users to compile their RTL designs into high-speed cycle-accurate models that can be used to:

• Generate accurate activity profiles and power state data for TSMC PPA models

• Simulate implementation accurate behavior for performance characterization

• Validate embedded software against final implementation



Combining implementation-accurate models generated from Carbon Model Studio with analysis and profiling capabilities of SoC Designer Plus provides an accurate system-level platform to characterize performance and power, two vital pieces to develop a competitive chip. Understanding these factors early in the design cycle is critical in making the correct trade-offs in the design and architecture of a SoC. In addition, the same platform can be used to develop and validate the project’s embedded software, enabling the software team to get a head start on their development.



The power data collected from Carbon models run in SoC Designer Plus is used with TSMC PPA models to understand the design’s power profile of the TSMC process nodes and operating frequencies. In this manner, the user can easily and accurately determine power benefits of migrating to new process nodes.



“Understanding the trade-offs between power and performance early in the design cycle is critical to a projects success for embedded applications,” states Andy Ladd, Carbon’s vice president of Applications and Methodology. “Not only do you need accurate power data, but you need to generate it in a realistic environment that represents how the final system will run. The accuracy of carbon models combined with the realistic system behavior provided by SoC Designer Plus achieves both.”