News & Analysis

AMD processors drive Hadron Collider data collection

30th June 2020
Mick Elliott

AMD and CERN, the European Organisation for Nuclear Research, has announced a new case study.

It reveals that CERN deployed AMD 2nd Gen EPYC processors to help collect huge throughput of data from the detectors on the Large Hadron Collider (LHC) – where the raw collision data arrives at the enormous rate of 40TB every second.

CERN has been preparing for the upcoming LHC restart in 2021 and has been looking for a hardware platform that is able to cope with the requirement of handling immense data throughput.

In particular, its LHCb experiment is an investigation into what happened just after the Big Bang that allowed matter to survive and build the universe we know today.

LHCb achieved ultra-fast I/O and memory with AMD EPYC processors.

The AMD EPYC CPU’s high core count paid dividends for data processing, and the support for 128 PCI Express 4.0 lanes was a standout feature.

LHCb used four Mellanox 200Gbit InfiniBand adapters per server and AMD EPYC 7742 processors with 64 cores enabled the four Mellanox networking cards in each server to run without bottlenecks. “With the AMD EPYC CPU we've been able to show more than a Terabit per second of data flowing from the servers sustained over days. Achieving this on a single server rather than requiring a supercomputer—as was the case in the past—is a significant advance,” says Niko Neufeld, Project Leader LHCb Online Computing, CERN. “We don’t have the computing power of Google or Facebook, but the AMD EPYC CPU enables us to do the processing we need in a relatively small and compact system. This was not possible 10-15 years ago. Now, there is room for growth. With the same EPYC technology it is possible to double our capacity in the same space. Our plans for subsequent years are to increase the detectors and sensors. It gives you a lot of head room. EPYC allows us to do more.”

“This solution allows us to reduce by one third the number of servers,” Neufeld continued. “This not only saves costs, but having fewer servers is also an advantage when you’re building a high-speed, low-latency network. With a larger network, you have more collision problems. The more compact you can make the system, the better.”

Featured products

Product Spotlight

Upcoming Events

View all events
Latest global electronics news
© Copyright 2022 Electronic Specifier