Nordson develops panel-level packaging solution

In one example, Nordson’s customer, Powertech Technology, Inc (PTI) witnessed underfill yields improve to greater than 99% as they plan to transition from wafers to panels in their manufacturing operations. 

PTI, one of the world’s top OSAT (Outsourced Semiconductor Assembly and Test) companies, worked with the Nordson applications team to set up a comprehensive PLP demonstration that achieved high-quality, void-free underfill results at scale, using the ASYMTEK Vantage Series fluid dispensing system, equipped with the ASYMTEK IntelliJet Jetting system. Nordson’s precision technology mitigated warpage and optimised fluid flow while decreasing cycle time by almost 30%.

PLP provides a path to managing the complexity of larger die sizes and higher-density designs while maintaining manufacturability and cost efficiency as the semiconductor industry transitions from 300mm wafers to panels. PTI is facilitating PLP applications that are designed to meet the semiconductor industry’s growing demands to serve AI, high-performance computing (HPC), and chiplet-based architectures.

Underfill has been pivotal in semiconductor packaging since the adoption of flip-chips in the 1990s. As applications have become more demanding, especially high-performance CPUs, GPUs, and advanced architectures like flip-chip and 2.5D/3D ICs, the importance of underfilling to enhance mechanical reliability and thermal performance has grown. Since the beginning, Nordson developed innovations for underfill processes as the industry evolved from PC board, substrate, wafer, and now panel applications.