Key features and benefits of the ##IMAGE_1_R##SN65LVDS324:
•Optimized solution for sensor-to-processor interface: As a dedicated bridge for video streams between HD image sensors and processors, the SN65LVDS324 lowers BOM costs by up to 20 percent compared to existing FPGA-based solutions.
•Dedicated sensor-to-processor interface: In 1080p60 system implementations, the SN65LVDS324 typically consumes less than 150 mW, reducing system power consumption by more than 10 percent versus current FPGA solutions.
•Smallest package size: Dedicated function provides a 50-percent smaller package than current FPGAs.
•Excellent video resolution: Supports a wide range of resolutions and frame rates, up to 1080p60-full-HD to maximize system performance.

The SN65LVDS324 is an extension of TI’s popular FlatLink and FlatLink 3G serial interface technology, which reduces the number of signal lines used for synchronous parallel data bus structures with no loss in data throughput. It is also optimized to work with a variety of processors, including TI’s OMAP and DaVinci processors for video applications.
Availability, packaging and pricing
The SN65LVDS324 is available in a 4.5-mm by 7-mm, 59-ball PBGA (ZQL) package. Suggested retail pricing in 1000-unit quantities is US$2.65.