The seminar will cover a wide range of topics in four two-hour sessions:
• An overview of high speed data conversion including a review of where the various ADC architectures fit in modern applications
• Optimizing data converter interfaces: a presentation of how to drive the ADC Analog and clock input, and deal with high speed ADC output data
• Supercharging DAC, DDS and PLL performance
• Optimizing PC board layouts and leveraging powerful design tools
In addition to the world class training sessions, participants will also receive a 30-day trial Multisim SPICE model CD and a high speed systems applications book.
Maidenhead – March 19
Cambridge – March 20
Leeds-Brighouse – March 21
Edinburgh – March 22
The seminars will begin at 08:30 and end at 16:30. For complete information on dates, locations and to register for a seminar, visit: www.analog.com/2007hsseminar-eu
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