The VPX551 provides dual Kintex UltraScale XCKU115 FPGAs, each providing over 1,400K logic cells, which interface directly to rear I/O via SERDES, LVDS and fibre. Each FPGA is supported by 16GB of 64-bit wide DDR4 (2 x Bank of 8GB) and 1GB flash. The rear panel fibre I/O is via six VITA 66.5 x12 modules, each of which can be populated as transmit or receive.
The front panel fibre I/O is via SFP+. The two FPGAs are connected by four SERDES lanes for high speed communication and load sharing, and each has 16 high-speed SERDES routed to P1/P2.
The VPX551 includes Tier 2 platform health management/monitoring capability using VadaTech’s field-proven IPMI software. In addition an on-board management controller has the ability to access board sensors and manage FPGA image updates. The unit is available in a range of temperature and shock/vib specifications per ANSI/VITA 47, including conduction cooled up to V3 and OS2.