ERI is a multi-year program designed to nurture research in advanced new materials, circuit design tools, and system architectures. In support of the POSH program, Synopsys will seek to develop critical signoff-quality emulation technology for mixed signal system-on-chips (SoCs) to enable faster time-to-market and improved quality of mixed-signal SoC designs for aerospace and defence applications.
A press release issued by DARPA on June 26, 2018, stated: “The agency has helped grow and integrate communities across the electronics ecosystem for decades and will continue that mission with ERI. ERI will address targeted applications for specialised, next-generation hardware, specifically artificial intelligence (AI), hardware security, hardware emulation, and photonics.”
To meet the program’s goals, Synopsys’ ZeBu Server emulation technology will serve as a foundation to host a converged solution for verifying digital and analog IP and SoCs achieving up to 100X performance increase compared to simulation. With its high performance, capacity, scalability, and support for standard-based connectivity protocols, ZeBu Server enables full system verification of ultra-complex mixed-signal SoCs.
Chris Tice, Vice President, Verification Continuum solutions in Synopsys’ Verification Group, added: “We are collaborating with leading semiconductor manufacturers and defence contractors to innovate a novel implementation of analog and mixed-signal acceleration in an emulation environment. We look forward to supporting ERI and expanding the emulation use cases while enabling faster time-to-market for mixed-signal SoCs.”