Devices fabricated with TSV technology have vertical electrodes and vias that pass through silicon dies to provide connections, an architecture that realises high speed data input and output while reducing power consumption. Real-world performance has been proven previously, with the introduction of Toshiba’s 2D NAND Flash memory.
Combining a 48-layer 3D flash process and TSV technology has allowed Toshiba Memory Corporation to successfully increase product programming bandwidth while achieving low power consumption.
The power efficiency of a single package is approximately twice that of the same generation BiCS FLASH memory fabricated with wire-bonding technology. TSV BiCS FLASH also enables a 1-terabyte (TB) device with a 16-die stacked architecture in a single package.
Toshiba Memory will commercialise BiCS FLASH with TSV technology to provide an ideal solution in respect for storage applications requiring low latency, high bandwidth and high IOPS/W, including high-end enterprise SSDs.
