R&D and validation teams characterising next-generation digital designs face several test challenges. With data rates continuously increasing, emerging data centre standards like OIF CEI and IEEE 802.3 Ethernet are moving to PAM-4 multilevel signalling formats.
In addition, many ASIC designs now use built-in self-test (BIST) capabilities such as built-in error counters. Engineers can typically access the error-count information only through vendor-specific interfaces and remote commands.
The M8000 Series BER test solution accelerates insight into digital designs with fast and accurate receiver characterisation for single- and multilane devices.
It consists of AXIe-based high-performance BERT and arbitrary waveform generator modules that are controlled from common user interface software. Using M8070A system software rev. 2.5.0.0, for the M8000 Series, engineers can now generate PAM-4 patterns up to 32 Gbaud symbol rate (corresponds to a 64 Gbit/s bit rate) and up to 4 channels with the M8195A arbitrary waveform generator and NRZ patterns with the J-BERT M8020A high-performance BERT from a common user interface.
Users can also accelerate test efficiency by integrating access to built-in error counters and device status registers from the M8000 user interface via IronPython scripts.
For accurate PAM-4 device characterisation and simulation, Keysight offers several complementary test instruments and software solutions.
