In stock at authorised distributor DigiKey are the Analog Devices AD408x family of successive approximation register (SAR) analog-to-digital converters (ADC).
It includes the 16-bit AD4084 and the 20-bit AD4081 and AD4080. These converters deliver high-speed, low-noise, low-distortion performance for precision, wide-bandwidth data acquisition applications.
All devices achieve signal-to-noise-and-distortion (SINAD) greater than 90 dBFS at input frequencies above 1MHz and simplify signal chain design through Easy Drive inputs that reduce settling artefacts, a continuous acquisition architecture that eases ADC driver requirements, and integrated oversampling with digital filtering and decimation.
System integration is further simplified with an on-chip low drift reference buffer, integrated LDO regulators, a 16K deep result first-in, first-out (FIFO) to reduce host processor loading, and integrated supply and reference decoupling capacitors, minimising PCB complexity and overall solution footprint.
The AD4080 is a 20-bit, 40 MSPS differential SAR ADC designed for applications requiring high dynamic range and deterministic conversion timing. It achieves a 46.25ns latency with >90 dBFS SINAD at input frequencies above 1MHz. Its Easy Drive differential input minimises input-dependent transient currents, and the continuous acquisition front end allows full cycle settling, easing ADC driver bandwidth demands. Integrated support blocks including a low drift reference buffer, on-package decoupling, VCM generation, 16K-sample FIFO, and digital averaging/decimation up to 210 simplify system-level design. The AD4080 supports single-lane DDR LVDS up to 800Mbps and dual-lane DDR up to 400Mbps, as well as SPI.
The AD4081 is a 20-bit, 20 MSPS differential SAR converter with 77.50ns latency and >90 dBFS SINAD at frequencies beyond 1MHz. Like the AD4080, it uses Analog Devices Easy Drive input to minimise converter-induced settling artifacts and supports continuous acquisition to reduce driver constraints. Noise spectral density, linearity, distortion, and drift performance make it well-suited for precision wide-band acquisition systems. It includes reference buffering, integrated decoupling components, VCM generation, a 16K-sample FIFO, and a digital decimation filter up to 210. LVDS options include 400Mbps single-lane DDR and 200Mbps dual-lane DDR, along with SPI.
The AD4084 provides a 16-bit, 20 MSPS option with a 78.13 ns latency while maintaining >90 dBFS SINAD at high-input frequencies. Its Easy Drive differential front end limits input-dependent settling effects, while the continuous-acquisition architecture reduces front end driver burden. As with the other devices in the family, the AD4084 includes integrated reference buffering, decoupling, VCM generation, a 16K FIFO, and digital decimation capabilities up to 210. Interface options include 320 Mbps single-lane DDR LVDS, 160Mbps dual-lane DDR LVDS, and SPI.
