LDRA, a TASKING Company, announced that the LDRA tool suite now supports advanced analysis of timing coupling interference on multi-core architectures. These new capabilities build on LDRA’s existing data coupling and control coupling tools, giving developers deeper insight into multi-core behaviour and enabling them to better mitigate timing issues. Data, control, and timing coupling are critical as multi-core processor are increasingly used to run embedded applications for aerospace and defence, automotive, industrial controls, IoT, and space applications that must adhere to strict functional safety and reliability standards.
Industry guidelines such as the FAA’s advisory circular AC 20-193 describe factors that can increase execution times in multi-core-based systems. When execution times exceed worst-case bounds, this can result in systems that are non-deterministic and unsafe. To measure execution time, developers evaluate the impact of data coupling and control coupling between tasks. However, they must also measure complex timing coupling interference that can arise between tasks that run on different cores.
Timing coupling is a hidden cause of interference that can increase a system’s worst-case execution time (WCET) based on contention for shared processor resources like bus interconnect or cache memory in multi-core architectures. Even when tasks executing on different cores have no direct data or control coupling, there may be interference on shared resources such as shared cache memory. For example, L1/L2 caches may be shared between cores. Tasks with larger data sets tend to use these shared resources more extensively, increasing the probability of interference and reduced efficiency even when there is no direct data or control coupling at the task level.
“Hidden interference at the multi-core level can be significant,” said Ian Hennell, Operations Director, LDRA. “In a study we collaborated on with the United States Army DEVCOM Aviation & Missile Centre Multi-Core Processing & Artificial Intelligence Laboratory, timing coupling interference resulted in up to a 40% increase in mean execution time. Now, armed with the ability to identify sources of timing coupling interference, their engineers can focus their development efforts where they will have maximum impact.”
Knowing where and why interference arises, as well as potentially how much it arises, enables developers to target their efforts and more quickly mitigate timing coupling interference. Rather than trying to optimise code for performance, for example, developers can adjust a task’s data set size or usage to reduce its impact on cache efficiency for tasks running on other cores.
The LDRA tool suite offers full support for both 32- and 64-bit instruction sets and addresses requirements traceability, coding standards compliance, and static and dynamic coverage analysis. These new timing coupling capabilities, together with LDRA’s industry-leading data coupling and functional coupling tools, give developers unprecedented access and insight into system behaviour and operation of even the more complex systems.
“LDRA’s time coupling capabilities are unique among embedded development tools,” said Christoph Herzog, Co-CEO/CTO, TASKING. “When the LDRA tool suite is combined with TASKING’s winIDEA and TASKING’s BlueBox debugger or virtual ECU simulator, developers have access to a comprehensive set of complementary static analysis, dynamic analysis, and unit/integration testing solutions that provide detailed run-time data. This enables the most thorough analysis of worst-case execution time in the industry. In this way, OEMs can feel confident that their complex embedded systems comply with even the most stringent industry standards.”
Available now, the LDRA tool suite with advanced timing coupling analysis will be featured in booth 2058 at Embedded World North America in Anaheim, 4-6th November.
