Grenoble team overcomes Edge AI hurdle with dual-mode memory breakthrough

A team of French scientists has unveiled a new hybrid memory technology that could remove a longstanding barrier to efficient Edge artificial intelligence, enabling devices to learn from real-world data without relying on energy-intensive Cloud infrastructure. A team of French scientists has unveiled a new hybrid memory technology that could remove a longstanding barrier to efficient Edge artificial intelligence, enabling devices to learn from real-world data without relying on energy-intensive Cloud infrastructure.
A single memory, which functions as both memristor and FeCAP, for neural network inference and training Photo: E.VIANELLO-M.PLOUSEY DUPOUY/CEA

A team of French scientists has unveiled a new hybrid memory technology that could enable Edge devices to learn from real-world data without relying on energy-intensive Cloud infrastructure.

The breakthrough, described in a paper published this week in Nature Electronics, combines two previously incompatible memory approaches—ferroelectric capacitors and memristors—into a single, CMOS-compatible architecture.

The system, developed by CEA-Leti in Grenoble, alongside several French research centres, is designed to support both training and inference of artificial neural networks directly on-chip.

Until now, hardware designers have been forced to choose between memory types that are optimised for inference or for training. Memristors, which are energy-efficient during read operations, excel at inference but lack the precision needed for training. Ferroelectric capacitors, by contrast, can perform fast and efficient updates but destroy stored data when read, making them unsuitable for inference.

The Grenoble-led team said its hybrid device sidesteps this trade-off by exploiting the strengths of both. “Forward and backward passes use low-precision weights stored in memristors, while updates are achieved using higher-precision ferroelectric capacitors,” said Michele Martemucci, lead author of the study. The approach, he added, ensures “efficient and accurate learning” while avoiding costly off-chip updates.

The researchers fabricated and tested their design on an 18,432-device array using standard 130nm CMOS technology, demonstrating that a single memory unit could act either as a ferroelectric capacitor or as a memristor depending on how it is electrically formed. This enables digital weight storage for training and analogue expression for inference within the same hardware.

The advance could pave the way for more adaptive and energy-efficient edge systems, from autonomous vehicles to medical sensors and industrial monitors, which require on-device learning to adapt to changing conditions.

In addition to CEA-Leti, contributors included Université Grenoble Alpes, CEA-List, CNRS, the University of Bordeaux, Bordeaux INP, IMS France, Université Paris-Saclay, and the Center for Nanosciences and Nanotechnologies. The work received support from the European Research Council and France’s 2030 government programme.

Keep Up to Date with the Most Important News

By pressing the Subscribe button, you confirm that you have read and are agreeing to our Privacy Policy and Terms of Use
Previous Post
Kurtz Ersa has announced its upcoming VERSAFLOW 4 Level II training courses, taking place on 27th to 31st October, 2025

Kurtz Ersa training courses

Next Post
Arc-Tronics, the Illinois-based electronics manufacturing services provider, has installed three new automated optical inspection systems from Japan’s Saki Corporation as it seeks to strengthen quality control for clients in the aerospace, medical, and defence sectors.

Arc-Tronics installs Saki inspection systems to strengthen aerospace and defence output