Design
What are the risks in medical device design?
Jean-Louis Evans, Managing Director at TÜV SÜD Product Service, explains how legislation can keep pace with the fast evolution of medical technology. While medical technology evolves at a fast rate, traditionally test standards develop much more slowly.
PCB design at a turning point
Today’s consumer needs are significantly increasing PCB design and created a number of business challenges for example, increased pressure to meet delivery deadlines, the need to lower development cost, increasing product reliability and the rise of differentiated products. However, a number of internal barriers such as increasing design complexity, frequent design changes and validation of performance mean that a number of trade-offs have ...
IAR Systems enhances ARM tools with extended static analysis
IAR Systems presents an updated version of the world’s most widely used C/C++ compiler and debugger toolchain for developing ARM-based embedded applications. Version 7.60 of IAR Embedded Workbench for ARM adds flash breakpoints functionality and extended static analysis in C-STAT. The highly requested tool C-STAT performs advanced static analysis by doing an analysis on the source code level.
Ethertronics reduces design schedule by half
Cadence Design Systems has announced that Ethertronics, a leader in ultra-high performance smart antenna system solutions, used Cadence Conformal ECO Designer to completely redesign the digital interface section of a complex RF/mixed-signal design by reusing transistors in the base layers, enabling the redesign in a metal only change.
Documentation solution for PCB design tool
Available exclusively for its PCB design platform, Designer 16.1, Altium is scheduled to release a new documentation workflow. Draftsman provides PCB designers with a unified documentation solution with customisable drawing views, documentation templates and a fully complete design to documentation workflow in Altium Designer 16.1.
Custom Compiler pioneers new era of visually-assisted automation
Synopsys has unveiled Custom Compiler, a custom design solution that closes the FinFET productivity gap by shortening custom design tasks from days to hours. To bring new levels of productivity to FinFET layout, Synopsys has taken a fresh approach to custom design by developing visually-assisted automation technologies that speed up common design tasks, reduce iterations and enable reuse.
Assisting custom design and IP productivity
The recently released Custom Compiler solution from Synopsys has been deployed at STMicroelectronics for custom design, initially starting with 28nm FD-SOI IP development. After an extensive evaluation and qualification for custom design and layout, Custom Compiler is being used for production work from schematic entry through custom layout at ST sites in France and India.
Accelerating design delivery
A complete suite of digital and sign-off tools from Cadence Design Systems has achieved certification for Samsung Foundry’s Process Design Kit (PDK) and foundation library for the 14LPP process.
Calibration tool for 3D scanner integrates into a C++ application
With the MCT3D (Metric Calibration Tool) EVT is presenting a calibration tool for 3D scanner. The tool is available not only for the EyeVision 3D programming software, but also as stand-alone Lib, which can be integrated into a C++ application. When using the MCT3D with the EyeVision software, the calibration function is integrated into the image capture layer EVHD VIC 3D (EyeVision Virtual Hardware Devide).
Easily debug designs combining MIPS & ARM CPUs
Lauterbach has announced that they are making it easy to use Lauterbach’s popular TRACE32 tools to debug MIPS heterogeneous CPU based systems or systems that combine MIPS CPUs with ARM CPUs. Lauterbach’s TRACE32 is a set of modular microprocessor development tools that provides integrated debug environments for embedded designs.