Design
Software could save 40% of customers’ time-to-market
Artesyn Embedded Technologies has announced a powerful software solution for its ATCA systems, which Artesyn believes could save up to 40% of customers’ time-to-market. System Services Framework (SSF) is a complete system management suite for Artesyn ATCA systems, allowing users or applications to configure and monitor the hardware and software elements of a single ATCA shelf or across multiple shelves.
Software speeds time to first prototype by 3X
Synopsys has announced the availability of Synopsys' ProtoCompiler software for Synopsys' HAPS FPGA-based prototyping systems. ProtoCompiler is an integrated prototyping tool set with built-in HAPS hardware knowledge, which enables the rapid bring-up of a prototype up to 3X faster than existing prototyping flows. ProtoCompiler also enables more efficient prototyping with HAPS by providing an automated partitioning engine, integrated deb...
IC validator certified for UMC's 28nm process
Synopsys and United Microelectronics Corporation have announced that UMC has certified Synopsys' IC Validator product for physical verification on the company's 28nm process. Joint customers can now reap the benefits of IC Validator for In-Design with confidence that the tool and its runsets have been fully qualified by UMC for accuracy and completeness.
14nm-based FPGA test chips successfully demonstrated
FPGA technology, based on Intel’s 14nm Tri-Gate process, has been successfully demonstrated by Altera. The 14nm-based FPGA test chips incorporate key IP components – transceivers, mixed-signal IP and digital logic – used in Stratix 10 FPGAs and SoCs.
Industry's first complete LPDDR4 IP launched
A complete LPDDR4 IP has been launched with the company, Synopsys, claiming it is the industry's first complete LPDDR4 IP solution. The IP includes Synopsys' DesignWare LPDDR4 multiPHY, Enhanced Universal DDR Memory Controller (uMCTL2) and verification IP (VIP), as well as hardening and signal integrity services.
Hardened floating-point DSP blocks are IEEE 754-compliant
Altera is industry's first programmable logic company to integrate hardened IEEE 754-compliant, floating-point operators in an FPGA, delivering unparallelled levels of DSP performance, designer productivity and logic efficiency. The hardened floating point DSP blocks are integrated in Altera’s 20nm Arria 10 FPGAs and SoCs, as well as 14nm Stratix 10 FPGAs and SoCs.
Reference design board for accurate current-sensing
By monitoring the voltage drop across a copper track on a PCB, a new reference design board from ams achieves linear current measurement up to 100A with an accuracy of ±1%. The board takes advantage of the very high sensitivity and precision of the AS8510, an integrated data acquisition front end which provides two measurement channels.
Cadence snaps up Jasper Design Automation
Cadence Design Systems is to buy Jasper Design Automation. The combination of Cadence’s System Development Suite and Jasper’s multiple verification solutions built on the JasperGold platform will expand differentiation of Cadence’s system verification platform, and will be tightly integrated with Cadence’s common debug analysis, formal and semi-formal solutions, simulation, acceleration, emulation and prototyping platforms...
Designing a UWB high-power-microwave travelling-wave antenna
This application note from Computer Simulation Technology discusses the design and implementation of high-power-microwave (HPM) travelling-wave antenna. The antenna is designed to be driven by a high-power, single-shot signal generator with 1ns pulse-width at the -3dB power points, and peak voltage of up to 100kV.
AWR software used to design UWB receiver
Italian electronics developer, Cover Sistemi used AWR software to design an ultra-wideband (UWB) receiver from concept to final production in a single pass. Specifications were for a complete design starting from the antenna through to the entire RF/baseband analog chain down to the AD converter.