Design
Synthesis engine addresses RTL productivity challenges
To address the productivity challenges faced by RTL designers, Cadence Design Systems has released the Cadence Genus synthesis solution, its next-gen RTL synthesis and physical synthesis engine.
Compilers in auto-motion
Embedded compilers for the needs of today's and tomorrow's automotive industry. By Jan Schlemminger, Field Application Engineer, Altium Europe GmbH
Ten years and counting
Steve Rogerson reports from Cadence’s CDN Live user conference in Munich.
Cadence & Imagination Technologies collaborate
Cadence Design Systems has announced that it is collaborating with Imagination Technologies to enhance RTL designer productivity and enable faster design convergence on Imagination graphics cores and other Imagination IP using the Cadence Genus synthesis solution. On the PowerVR GE7800 GPU, the Genus synthesis solution achieved a five times improvement in turnaround time versus the previous Cadence synthesis solution with no impact on Power, Perf...
New code analysis possibilities for AVR developers
IAR Systems presents version 6.60 of its development tools IAR Embedded Workbench for AVR. The update extends code analysis possibilities with the integration of static code analysis tools as well as stack usage analysis.
Development package enables better embedded systems
Helping engineers implement better embedded systems, FTDI Chip has worked with MikroElektronika to introduce a cost effective development package based on the ground-breaking FT90x MCU series. For the launch, a free MikroElektronika Clicker 2 board worth $39.95 is being offered with every FT90x Compiler license purchase.
Demonstrator offers turnkey solution for the wearable market
A wearable demonstration device, which combines low-power embedded processing, wireless, touch and sensor technologies, has been introduced by Atmel. Measuring 7x9cm, the Smart Badge brings together hardware and software technologies from Atmel and partners into an out-of-the-box solution that addresses the requirements of the wearable market.
IC compiler place & route increases designer productivity
Synopsys has announced that STMicroelectronics has taped out its latest Fully Depleted Silicon On Insulator (FD-SOI) SoC using Synopsys' IC Compiler II place and route solution. Collaborating closely with Synopsys, ST used the tool to complete more than half of the chip, achieving higher designer productivity and better device performance.
Safely drive the internet highway to the smart home
Compared to most of the world’s infrastructure, it is amazing how primitive and lawless the internet really is. Yes, the web is technically sophisticated but when trying to understand how it should be used and how it can benefit our lives, it is still a wild and unruly path, needing a great deal of growth and maturing. By Cees Links, CEO, GreenPeak Technologies.
DCIM enhancements improve capacity management
Emerson Network Power has enhanced its Trellis Data Centre Infrastructure Management (DCIM) solution, adding REpresentational State Transfer (RESTful) APIs, to change planning capabilities, and eight base package reports. The platform offers an integrated view of operations across both IT and facilities resources, enabling better capacity management decisions and saving time and costs.