Test & Measurement

Avoid setup issues for wafer-level tests

7th February 2020
Alex Lynn
0

Photonic integration provides higher density, increased performance, and lower cost, enabling multi-terabit Ethernet switching and communication, quantum computing, LIDAR, and bio-sensing applications. Discover the webinar which addresses wafer-level opto-electrical measurements for integrated & silicon photonics.

High quality, fast, and comprehensive parametric testing at the wafer-level generates large volumes of device performance data for design verification and reduces cycle time for good die selection in large volume manufacturing. This webinar explains the setup and measurement methods for on-wafer parametric optical and high-frequency characterisation of integrated photonics devices

The webinar is on March 4th 11am CET

In this webinar you will learn how:

  • Integrated photonics enables a new wave of chips, systems, and optical components to address the growing need for faster and more data.
  • Parametric testing at the wafer-level accelerates design verification and reduces manufacturing time.
  • To perform on-wafer parametric optical and high-frequency characterisation of integrated photonic devices.

Click here to register for the webinar.

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