Design

Synopsys enables Arm's next generation of mobile IP

27th May 2020
Alex Lynn
0

Synopsys has announced that it has collaborated with Arm to enable tapeouts of optimised system-on-chips (SoCs) for early adopters of Arm's latest mobile IP, including Arm Cortex-A78 and Cortex-X1 CPUs, and Mali-G78 GPU.

A range of Synopsys solutions, including the Synopsys Fusion Design Platform, Verification Continuum Platform, and DesignWare Interface IP, were used in the design of smartphones, laptops, other mobile devices, 5G, augmented reality, and machine learning products based on Arm's new processors.

To help designers accelerate time-to-market (TTM) and achieve optimal power, performance, and area (PPA) targets, Synopsys QuickStart Implementation Kits (QIKs) are available today.

"The nearly three decade collaboration between Arm and Synopsys has enabled our mutual partners to quickly realise power and area gains in the design of their Arm-based devices," said Paul Williamson, Vice President and General Manager, Client Line of Business at Arm. "Our next-generation mobile solution builds on the success of the Cortex-A77 and Mali-G77, and combining it with Synopsys' platforms and IP solutions gives our partners the confidence to deliver the Arm-based mobile devices needed for the era of digital immersion."

Leveraging the collaboration that enabled successful early adopter tapeouts, the QIKs provide implementation scripts and reference guides and take advantage of Synopsys Fusion Compiler technology to deliver enhanced PPA and faster turnaround.

To help designers achieve their targets quickly and confidently, Synopsys offers design services based on extensive experience hardening Arm processors. The services available range from QuickStart implementation through turnkey core hardening.

The Synopsys Fusion Design Platform has been leveraged for optimised implementation of the new mobile cores and incorporates many Synopsys industry-leading products, including:

  • Fusion Compiler design, Design Compiler NXT synthesis, and IC Compiler II place-and-route system for efficient, low-power design implementation.
  • Signoff closure with PrimeTime PBA-based ECO with power recovery and exhaustive PBA along with StarRC simultaneous multi-corner extraction.
  • Early, accelerated design optimisation for power integrity and reliability with the RedHawk Analysis Fusion signoff-driven flow within Fusion Compiler and IC Compiler II place and route.

Early adopters of Arm's new premium mobile platform are using Synopsys Verification Continuum solutions extensively with:

  • Earlier, faster, scalable software development and test from anywhere at any time with Synopsys Virtualizer Development Kit (VDK) with Arm Fast Models for Cortex-A78 and Cortex-X1 CPUs.
  • Synopsys VCS simulation with fine-grained parallelism technology for Arm Cortex-A processors.
  • Synopsys industry-leading verification IP and test suites for the latest Arm AMBA interconnect.
  • Synopsys ZeBu Server for system verification and benchmarking.
  • Synopsys HAPS hardware for high performance, scalable FPGA-based prototyping proven with latest Arm cores.

Synopsys' high-quality DesignWare Interface IP enables rapid development of mobile Arm-based SoCs. DesignWare IP for mobile markets includes controllers and PHYs for USB, DDR/LPDDR, PCI Express, MIPI, HDMI, Bluetooth and mobile storage interfaces, and is shipping in billions of units today.

Charles Matar, Senior Vice President of System Solutions and Ecosystem Enablement, Design Group at Synopsys, said: "To ensure mutual customer success with each new generation of Arm processors, Synopsys and Arm work closely starting early in the development process to optimise our Synopsys Fusion Design and Verification Continuum Platforms and DesignWare Interface IP.

"This ongoing collaboration allows our mutual customers to leverage the latest features in the Synopsys suite of solutions to achieve optimal PPA and TTM targets for Arm's new Cortex-A78 and Cortex-X1 processors and Mali-G78 GPU."

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