Silicon Frontline Continues on Path to Success, Verifies Hundreds of Designs with Its Post-Layout EDA Software

18th October 2010
ES Admin
Silicon Frontline Technology announced today that its software has been used to accurately verify over 250 electronic designs to date. The company now has over 25 customers, who use its software to analyze power devices, nanometer and Analog Mixed Signal (A/MS) designs. This list includes 10 of the world’s top 30 semiconductor companies. In addition, leading foundries have validated Silicon Frontline’s products for use with their nanometer design technologies and reference flows.
Silicon Frontline’s post-layout verification software delivers Guaranteed Accuracy, full-chip capacity and performance at least 20 times faster than other commercial field solvers. Users specify the level of accuracy desired, net by net, at the block level or with regular expressions. In this way, the resulting parasitics are guaranteed correct within the specified accuracy.

“We have achieved much since our product introductions fifteen months ago,” said Yuri Feinberg, Silicon Frontline CEO. “We are pleased to have so many early customers increase their usage of our tools and to see new customers adopting our tools. Our visibility continues to grow and customers are working with us to create post-layout software that will further improve design quality and meet the challenges of their chosen nanometer semiconductor technologies.”

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