Debug ARM code in TI multicore KeyStone architecture

Larry Osborn, ASSET product manager for Arium tools, comments: “Software bugs are always hard to track down and trace in mutlicore environments. For developers to keep pace with today’s demanding design schedules, they really have to have debug tools that take advantage and extend the capabilities of the on-chip resources in ARM cores."

To serve the needs of different types of design teams that may be developing a wide range of applications, two ASSET Arium run-control probes support the SourcePoint ARM debugger.

The LC-500S is a cost-effective run-control probe for debugging ARM code for the KeyStone II architecture. SourcePoint on the LC-500S supports TI’s Embedded Trace Buffer and takes advantage of ARM’s Program Trace Macrocell and System Trace Macrocell capabilities. The SourcePoint ARM debugger provides extensive post-capture analytics, results graphing and search functionality.

The LX-1000 Trace Port Analyzer supports extensive external storage of two gigabytes for trace results. Software and firmware engineers can thoroughly and effectively examine the trace results stored in the LX-1000 to identify the precise location of the cause of a bug in the code. Post-processing capabilities such as statistical tabulation and others are synchronized with SoucePoint’s line-by-line code display of trace results. The Arium tools will also be available as part of the ScanWorks platform in its test and validation toolset.

Pricing and availability

ASSET’s SoucePoint ARM debugger for TI’s KeyStone II architecture is available now from ASSET InterTech and its distributors. Solutions start at $4,950.