Design

Debug tool tackles Hyperflash memory

20th August 2015
Mick Elliott

Lauterbach is now supporting the Spansion HyperFlash memory with its TRACE32 tools. The HyperBus Interface was introduced by Spansion in 2014 as a powerful improvement on today's low pin count memory interfaces and has been broadly implemented by the system-on-chip (SoC) manufacturers.

HyperFlash Memory is based on the HyperBus interface and provides important characteristics such as low latency, high read throughput and space efficiency. 

“Our TRACE32 tool now supports the HyperFlash memory with intuitive, fast and flexible Flash Programming features,” said Barry Lock, UK Manager at Lauterbach. “The TRACE32 tool provides the user with control of reading, displaying and erasing the content of the flash memory and the content is displayed in a standard hex dump which allows the contents to be checked quickly. The tool also supports the pairing of HyperFlash memory with the HyperBus interface and also with the ordinary Quad SPI controller. “ 

 

 

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