Functional safety design flow speeds IEC61508 certification
Lattice Semiconductor has introduced a functional safety design flow solution which enables users to simplify and speed up the IEC61508 safety certification process for safety-critical applications using Lattice FPGAs. Certified by TÜV-Rheinland, the solution enables engineers to adhere to latest safety design methodology, save time and reduce costs.
Jim Tavacoli, Senior Director, Product and Segment Marketing, Lattice, commented: “By using Lattice’s qualified functional safety design flow, designers can adhere to the latest safety design methodology when developing safety-critical designs, accelerate their certification process and reduce design costs."
IEC61508 has become the global standard for functional safety certification, with many industry specific standards derived from it. The Lattice solution comprises a design flow and the development tools necessary to ensure that applications comply up to SIL3 certification. The solution includes: Lattice Diamond Design Tools suite (a complete design and verification flow including Lattice Synthesis Engine and incorporating third party tools such as Aldec Active-HDL simulator and Synopsys Synplify Pro synthesis) and a safety user manual. Lattice FPGAs covered include both non-volatile MachXO, MachXO2 and LatticeXP2 families, as well as SRAM-based LatticeECP2, LatticeECP2M & LatticeECP3 families.
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