Design

Ethernet controller from Nu Horizons minimises packet loss

20th February 2008
ES Admin
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Nu Horizons Electronics has announced availability of the LAN9218i from SMSC. This single-chip 10/100 Ethernet controller is designed for high performance embedded applications. Packet loss is reduced or eliminated through the use of 16KByte of internal SRAM that can hold over 200 received packets. If the receive FIFO gets too full, the device automatically generates flow control packets to the remote node, or asserts back-pressure on the remote node by generating network collisions.
The controller integrates Ethernet MAC and PHY with a high performance SRAM-like slave interface. The simple but functional host bus interface provides a glue-less connection to most common 16 and 32-bit microprocessors and microcontrollers. It includes large transmit and receive FIFOs with a high speed host bus interface to accommodate high bandwidth, high latency applications. In addition, the device’s memory buffer architecture allows the most efficient use of memory resources by optimising packet granularity.

The device’s numerous power management and wake-up features mean it can operate in a reduced power mode, and can then be programmed to issue an external wake signal via several methods. This is ideal for triggering system power up using remote Ethernet wake-up events. It is fully IEEE 802.3 10BASE-T and 802.3u 100BASE-T compliant, and supports HP Auto-MDIX.

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