Microsoft and Synopsys realise benefits of AI for chip design
Following the Microsoft Build conference, which kicked off on 19 May in Seattle, Synopsys, who was featured as a launch partner for the unveiling of the Microsoft Discovery platform, is collaborating with the company to harness AI for chip design.
The collaboration began with Synopsys.ai Copilot, which started with Generative AI-powered assistive capabilities and progressed to creative capabilities. The next joint focus will be on Agentic AI.
"Semiconductor engineering is among the most complex, consequential, and high-stakes scientific endeavours of our time, which makes it an extremely compelling use case for artificial intelligence," said Raja Tabet, SVP of Engineering Excellence Group, Synopsys. "By integrating Synopsys' pioneering AI-driven design solutions with Microsoft Discovery, we can realise the promise of agentic AI, re-engineer chip design workflows, supercharge engineering productivity, and accelerate the pace of technology innovation.”
Agentic technology will augment and not replace human engineers. As an example, some teams may choose to use their increased productivity to accelerate design cycles while others may choose to use their resources to tackle ever-increasing complexity or build even more products, now possible with the same number of engineers.
This shift will necessitate fine-tuning workflows, leveraging expert domain knowledge, implementing efficient knowledge management systems, and utilising advanced Cloud computing infrastructure. The AgentEngineer workforce of the future promises to establish a new paradigm for engineering teams to optimise productivity and drive business value — built on foundational AI capabilities achieved through this collaboration.
“Our collaboration with Synopsys is a testament to what’s possible when deep domain expertise meets cutting-edge AI,” said Aseem Datar, VP, Product Innovation, Microsoft. “Together, we’re not just accelerating chip design — we’re redefining what engineering teams can achieve with AI — it’s a net new paradigm. We’re thrilled to help bring Synopsys’ vision to life on Microsoft Discovery.”
In late 2023, Synopsys introduced Synopsys.ai Copilot, a GenAI capability powered by Azure OpenAI Service and Azure AI infrastructure, combined with Synopsys' AI-driven electronic design automation (EDA) workflows. The aim was to boost semiconductor engineering productivity regardless of the experience of the designer and helping to bridge the 15-30% industry workforce gap projected to happen by 2030.
Industry leaders are now leveraging Synopsys.ai Copilot to accelerate their chip design efforts and meet shorter development cycles despite increasing design complexity.
Synopsys.ai Copilot’s assistive capabilities are helping democratise access to EDA expertise. Its customers' design teams, working on implementation, verification, and signoff workflows, have leveraged Synopsys.ai Copilot’s knowledge assistance — and have realised up to 10X faster response time for information retrieval and script creation tasks. This is based on work conducted by design engineering teams across all experience levels — from newcomers to seasoned experts. This dramatic acceleration is driven by Synopsys.ai Copilot's ability to provide contextually relevant answers to complex EDA tool and flow questions instantly, eliminating the need to search through extensive documentation or seek expert guidance.
Microsoft is harnessing Synopsys.ai Copilot’s creative capabilities to automate formal verification workflows, traditionally one of the more specialised and time-consuming aspects of chip design. Microsoft's silicon team has used this to create formal testbenches, including generating System Verilog Assertions (SVAs), auxiliary logic, TCL scripts, properties and bind files.
According to industry experts, this technology achieves over 80% syntax accuracy and 70% functional accuracy for most properties — a significant milestone in automated formal verification. This high accuracy rate means engineers spend less time debugging syntax issues and more time focusing on design validation.
GenAI capable EDA has already proved its value for chip design in a short period of time, laying a foundation for improved productivity, quality, and time to results.