Full bridge SiP includes gate drivers and MOSFETs

With a footprint 60% smaller than a comparable circuit built from discrete components, the PWD13F60 can also boost end-application power density. By integrating four power MOSFETs, it presents an efficient alternative to other modules on the market that are typically dual-FET half-bridge or six-FET three-phase devices.

Unlike either of these choices, only one PWD13F60 is needed to implement a single-phase full bridge, leaving no internal MOSFETs unused. There is also flexibility to configure the module as one full bridge or two half bridges.

Leveraging ST’s high voltage BCD6s-Offline fabrication process, the PWD13F60 integrates gate drivers for the power MOSFETs and the bootstrap diodes needed for high-side driving, which simplifies board design and streamlines assembly by eliminating external components. The gate drivers are optimised for reliable switching and low EMI (Electromagnetic Interference).

The SiP also features cross-conduction protection and under-voltage lockout, which helps further minimise footprint while ensuring system safety.

Further attributes of the PWD13F60 include a wide supply-voltage range, extending down to 6.5V for maximum flexibility and simplified design. In addition, the SiP inputs can accept logic signals from 3.3-15V to ensure easy interfacing with microcontrollers (MCUs), Digital Signal Processors (DSPs), or hall sensors.