The new family builds on the award-wining PolarPro platform, offering a more compact architecture that allows for higher levels of integration in a single device. It is the ideal silicon platform for delivering customer- or market-specific combinations of QuickLogic's proven system blocks for storage, wired/wireless communication, video/imaging, security and other custom functions. PolarPro II also enables higher design flexibility. The I/O section, for instance, now offers eight independently-powered banks to simplify integration into multi-voltage systems, eliminating the need for costly level-shifting circuitry.
PolarPro II also adds a more advanced power management scheme. The core voltage can now scale as low as 1.5V to reduce dynamic power consumption. The platform also offers a VLP mode that freezes device operation, during which the static current drops to less than 5 microamps. Entry and exit from the VLP mode are as fast as 10 microseconds, allowing system developers to conserve energy by shutting the device down between bursts of activity.
PolarPro II is specifically designed to meet the connectivity, intelligence, security, and system logic requirements of portable and mobile applications, said Howard Li, Senior Solution Marketing Manager. It provides a wide range of I/O interfaces for the mobile market. Coupled with a library of proven system blocks for its configurable fabric, PolarPro II addresses critical connectivity, control and intelligence needs in mobile device design, delivering solutions based on our customers' specific requirements.
The first platform in the PolarPro II family will begin sampling in April 2008, with other family members to follow. Device capacity will range to as many as 27 Customisable Building Blocks or CBBs, a size that allows users to use PolarPro II to extend a mobile product's capability with a large range of functions, such as high speed UARTs, SDIO interfaces, and CPRM security (QuickLogic offers a very wide range of proven system blocks in its library and will configure the device for specific applications). The first platform will be available in a package size as small as 5x5 mm (TFBGA) for reduced board space and cost, as well as in known good die configurations.