Analogue front ends (AFEs) can be seen as an increasingly troublesome aspect of electronic design, due not only to the scarcity of the necessary design skills, but the widening use of sensors.
With their characteristically small and sensitive signals, sensors are in many ways the most challenging design scenario for even experienced analogue designers; not only do their outputs feature very small signal excursions, their parameters can drift over time, their stability influenced by environmental conditions and even their uniformity subject to tolerances.
As a result, sensor interface circuits, or AFEs, often involve complex and iterative development, invariably ending in a conversion stage to the digital domain. Each stage in the signal chain is subject to tolerances, exacerbated by the fact that most sensor AFEs require at least four distinct stages; amplification, filtering, conversion and monitoring. In each of these four stages, the components or analogue building blocks are commonly available; typically operational amplifiers (in various configurations) and digital/analogue converters, along with their associated passive components.
Moving these building blocks in to a platform that supports flexible, programmable configuration — akin to a digital design process — has long been a goal of semiconductor manufacturers, history holds many examples of programmable analogue solutions; some that survive today and many that didn’t meet with market approval. Now Renesas is making a play for this elusive and largely unproven application segment.
Smart Analog is the name Renesas is giving to this new approach and it promises to make AFE design simpler and more intuitive, coming in two variants — with or without an embedded microcontroller.
The platform comprises a 3-channel configurable amplifier, a single-channel amplifier with synchronisation detection, a single-channel general-purpose amplifier, a single-channel low-pass filter with variable cut-off frequency, and a single-channel high-pass filter (also with variable cut-off frequency). By setting the main parameters of these blocks and then their connections, it is possible to configure an AFE without any detailed knowledge of analogue design.
Of the five blocks (as shown in Figure 1), Renesas says the 3-channel configurable amplifier offers the most scope for customisation. It can be used to create a transimpedance amplifier, a non-inverting amplifier, an inverting amplifier, a differential amplifier or a summing amplifier — with a range of signal amplification gains and voltage offsets.
Figure 1: An implementation amplifier using Smart Analog
In addition, the blocks can be configured to create a single-channel high-impedance instrumentation amplifier; a type of differential amplifier commonly used to interface to high-impedance sensors.
Mixing It Up
The second device in the Smart Analog line-up integrates an MCU alongside the analogue blocks. The benefits here are not only fewer components; the MCU can (partially) reconfigure the analogue components while operating. This allows multiple sensors to be connected to a single device, providing of course that not all sensors need to be active at one time, and the internal connections between inputs and the analogue blocks don’t cause unnecessary interference with the weak sensor outputs.
Another benefit of combining an MCU with the programmable analogue stages means drift and other variations in sensor performance needn’t only compensated for in software; amplifier and filter parameters can be adjusted over time to compensate for sensor ageing or other artefacts, providing the sensors have been suitably characterised beforehand.
Mixing digital and analogue to create a programmable platform isn’t new, of course; as well as some smaller device manufacturers who specialise in programmable and configurable analogue solutions, Cypress continues to develop its PSoC family, which successfully mixes an MCU with configurable analogue blocks. The latest addition to the family, the PSoC 4, features ARM’s Cortex-M0, arguably the most widely deployed 32-bit architecture in microcontrollers today.
It’s the first PSoC variant to feature the Cortex-M0 but not the first to be ARM based, as it joins the PSoC 5 which features the slightly more capable Cortex-M3 (along with the PSoC 1 and PSoC 3, both of which feature 8-bit cores.)
Although full details of the analogue sub-system used in the PSoC 4 are yet to be disclosed, it is expected to offer op-amp(s), comparators and voltage reference(s), and be able to implement transimpedance amplifier(s), programmable gain amplifier(s), instrumentation amplifier(s) DACs, ADCs, and high/low-pass filters.
Renesas was unable to confirm how the programmable element of its Smart Analog will be implemented but it’s possible it will use a switched capacitor approach. Similarly, the details of the PSoC 4’s analogue configuration are still undisclosed, but the PSoC 5’s architecture is known; it uses a switched capacitor/continuous time approach to create functions including op-amps, unity gain buffers, programmable gain amplifiers, transimpedance amplifier and mixer.
As with the PSoC 5, the PSoC 4 will also feature Cypress’ CapSense technology for interfacing/implementing capacitive touch sensing.
Cypress has released a roadmap for the PSoC 4 family which details four devices, differentiated by their level of functional integration and performance, and making a clear distinction between parts labelled ‘intelligent analog’ and ‘performance analog’. Just how these parts will differ is unknown at this time but clearly there will be a premium to pay for the highest analogue performance.
And this is really what has differentiated all programmable analogue device — both in the past and the present; the level of performance achievable using a programmable solution. Typically the parts in question use switched capacitor technology to emulate passive components and it is here where the real differentiation exists, rather than the integration of amplifiers and an MCU core. Whether Renesas’ Smart Analog or Cypress’ PSoC family will be able to deliver the right mix of programmability and performance for analogue front ends (or any other analogue function) still remains to be demonstrated.