Micros

Renesas Technology 32-bit CISC microcontroller now available in small pin count 64/80-pin QFP and 100-pin LGA packages

11th November 2008
ES Admin
0
Renesas Technology Europe today announced the availability of 64-pin QFP, 80-pin QFP and 100-pin 5.5mm x 5.5mm LGA package versions of its popular 32-bit CISC R32C/111 microcontroller. The R32C/100 series is the top-level product series in the M16C Platform, *1 which is a CISC (Complex Instruction Set Computer) microcontroller. The core is upward compatible with existing CPU cores in the platform, and also provides improvements in operation processing performance, bus usage efficiency and code efficiency.
R32C/111 LGA product comes in a small 100-pin LGA (5.5mm × 5.5 mm) package, which is currently the smallest package with the largest Flash memory integration that Renesas can offer for a 32-bit CISC MCU.

The new package devices are scalable with on-chip Flash and RAM memory in densities of 256kB/32kB to 512kB/63kB.

“The small pin count devices, in addition to the existing R32C product line-up, with the ease-of-use and the cost of the R32C/111 eliminate all remaining obstacles to have a closer look to this 32bit CISC MCU,” comments Bernd Westhoff, product marketing manager of Renesas’ consumer and industrial business unit “Furthermore, we currently believe that our new R32C/111 LGA package is the smallest 32-bit CISC device with up to 512kB Flash memory making it as an ideal solution for size sensitive applications such as in a Bluetooth module or in the handheld consumer electronics field where miniaturisation is a must criteria.”

The new 64/80-pin count devices are ideal for motor control area where a FPU is mandatory feature to support effective vector control. It is also well suited to metering applications where a software modem is required. The 100-pin LGA package is particularly well suited for portable applications such as digital still camera and small applications like Bluetooth modules.

The R32C/111 group has a maximum operating frequency of 50 MHz, which in combination with improvements to the CPU core architecture, an overall processing performance of 42 DMIPS executing code from embedded flash. It also incorporates an on-chip 32-bit multiplier, single-precision floating-point unit (FPU) and a 32-bit enhanced barrel shifter for dramatically improved operation processing performance. An expanded, on-chip 64-bit memory bus has improved bus efficiency.

The devices include a variety of on-chip peripheral functions, including a watchdog timer, high-functionality timers and four DMA controller channels. Additional features include nine free scalable USART, 26 channels of 10-bit A/D converter, two 8-bit D/A converter channels, a CRC calculation circuit for improved communication data reliability and an X-Y converter circuit supporting high-speed rotation or enlargement of image data.
The new E8a on-chip debugging emulator is available as a low cost development environment. The E8a can also be used as a flash programmer. For the enhanced debugging requirements a single line E30A debugger could be used.

The R32C/111 in this new package options is currently sampled to lead customers and samples will soon be generally available on demand.

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