UltraScale+ high memory bandwidth MPSoC module

28th August 2019
Source: Enclustra
Posted By : Alex Lynn
UltraScale+ high memory bandwidth MPSoC module

With the Mercury+ XU9 MPSoC module, FPGA specialist Enclustra presents the sixth SOM family based on the Zynq UltraScale+ MPSoC from Xilinx. To achieve the highest possible memory bandwidth, it is equipped with two memory banks: a 64-bit wide DDR4 SDRAM (up to 4 GBytes) connected to the PL and a 72-bit DDR4 ECC SDRAM (up to 8 GBytes) connected to the PS. Thus, the module achieves a memory bandwidth of up to 38.4 GByte/sec. 

In order to transport the data to be processed into and out of the module as quickly as possible, 20 multi-gigabit transceivers with a data transmission rate of up to 15 Gbit/sec each are available.

In addition to the usual standard interfaces such as two Gigabit Ethernet and USB 3.0 ports, dedicated interfaces like DisplayPort, SATA, as well as SGMII are available on the 74 × 54 mm small module. The Mercury+ XU9 is also populated with a 16 GByte eMMC and a 64 MByte QSPI Flash. Both the processing system and the FPGA matrix have PCIe connections.

The Xilinx Zynq UltraScale+ MPSoC is manufactured in a 16nm FinFET+ process and has 6 ARM cores: four 64 bit ARM Cortex-A53 with a clock frequency of up to 1333 MHz and a 533 MHz fast 32 bit ARM dual core Cortex-R5. The processors are supported by a Mali-400MP2 GPU and a H.264/H.265 video codec (EV variants).

Enclustra offers a broad design-in support for their products. With the Mercury+ PE1-300 or Mercury+ PE1-400 base boards, the Mercury+ XU9 can be a powerful development and prototyping platform.

Enclustra also offers a comprehensive ecosystem for the XU9, offering all required hardware, software and support materials. The Mercury+ PE1 base board is a complete development platform; detailed documentation and reference designs make it easy to get started, in addition to the user manual, user schematics, a 3D-model, PCB footprints and differential I/O length tables. 

The Enclustra Build Environment can be used to compile Linux for the Enclustra SoC modules with integrated ARM processors very smoothly. The module and base board are selected by a graphical interface. After that, the Enclustra Build Environment downloads the appropriate Bitstream, First Stage Boot Loader (FSBL) and the required source code. Finally, U-Boot, Linux and the root file system based on BusyBox are compiled.

Thanks to the family concept with compatible connectors, different types of modules can be used on the same base board. If for example, an ARM processor is not required, the Mercury+ KX2 FPGA module can be used on the same base board instead.


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