Memory

Pinpoint accuracy with 3D NAND Flash optimisation

13th November 2019
Alex Lynn
0

NAND Flash has become a mature technology, and the varieties of formats that are now available are already adopted in many industrial applications. However, with the desire to go beyond the standard options, Apacer has developed certain optimisations of NAND Flash technology. 

The goal of these optimisations is to provide customers with the amount of P/E cycles that best suits their application.

Previously, Apacer developed one form of NAND Flash optimisation known as SLC-lite. The central concept behind SLC-lite is to make 2D MLC behave like SLC. MLC contains two bits, but by programming only one of the two bits, the least significant bit (LSB), the cell distribution behaves almost identically to that of SLC flash. The endurance is then greatly increased, reaching 20,000 P/E cycles. Standard 2D MLC can only reach 3,000 P/E cycles.

However, with the maturity of 3D NAND Flash technology, Apacer’s engineers developed a similar process to SLC-lite for 3D NAND drives. The new form of this technology is called SLC-liteX. SLC-liteX is based on 3D NAND technology. The standard bit format for 3D NAND TLC stores three bits in one cell. SLC-liteX programs only one of the three bits. So the capacity of SLC-liteX is only reduced by two-thirds. 

The advantage of this tradeoff is that P/E cycles are increased. The firmware is carefully tweaked by Apacer’s engineering team so as to offer the greatest number of P/E cycles in this format – 30,000, which is 10 times more than MLC or industrial 3D TLC. The longest lifespans are therefore available at reasonable cost. 

Apacer SLC-liteX is available in 2.5’’, M.2 2280, M.2 2242, MO-300, MO-300B, CFast, Module 7Pin, SD and microSD form factors and expecting to start sampling by the end of Q4, 2019. 

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