Memory
Hardware latencies associated with PRU-initiated memory reads
The PRU is a scalar processor, processing each instruction sequentially. With the exception of memory read instructions, all PRU instructions execute in a single cycle. However, the execution time of PRU read instructions varies based on memory access latencies.
Subsequent instructions will not execute until the completion of the read instruction and may impact time-sensitive operations and applications.
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APV1111GVY
Panasonic
Panasonic PhotoMOS® Photovoltaic MOSFET High-Power Drivers
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| Cost: | $3.95 |
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