Production-qualification milestone reached for PolarFire FPGA family

Posted By : Daisy Stapley-Bunten
Production-qualification milestone reached for PolarFire FPGA family

Microsemi has announced its first cost-optimised, low power, mid-range PolarFire Field Programmable Gate Array (FPGA) device is now production-qualified. With 300K Logic Elements (LEs), the second largest device in the family targets a variety of applications in the communications, defence, industrial and aviation markets. The company also announced full Libero SoC Design Suite support for PolarFire devices, giving designers the ability to design in any member of the family.

PolarFire FPGAs have now been adopted by dozens of customers in key communications, defence and industrial infrastructure market segments, and early access customers are moving into early production qualification with the family. These systems have a substantially lower cost of ownership, as the PolarFire family enables significantly lower power consumption and an ability to operate in harsher thermal environments.

"With the first award-winning PolarFire device production-qualified, current customers can now release their end products into the market and new customers can start their PolarFire designs with the assurance they are utilising an FPGA family that has gone through a robust qualification regimen, completing thousands of man hours of testing and validation," said Suresh Menon, Vice President of engineering at Microsemi. "All other PolarFire family members will now be rolled out in the forthcoming months and can be designed in today using Microsemi's comprehensive, easy to learn, easy to adopt Libero SoC Design Suite, giving designers a true alternative for mid-range FPGAs."

Apart from the comprehensive Libero Design Suite and SmartDebug debugging tool suite, Microsemi also offers complete solutions for 1G Ethernet, 10G Ethernet, JESD204B, Double Data Rate (DDR4) memory interfaces, AXI4 interconnect Intellectual Property (IP) and many others found in the company's IP Catalog targeting PolarFire FPGAs and the PolarFire Evaluation Kit.

Credit: Microsemi

According to market research firm Industry ARC, the overall FPGA market is expected to grow at a Compound Annual Growth Rate (CAGR) of nearly six percent from 2017 to 2023, expanding from $4.79bn to $6.68bn during the forecast period, driven by replacement of Application-Specific Integrated Circuits (ASICs) and other Programmable Logic Devices (PLDs) with FPGAs. Microsemi's 300K LE MPF300T PolarFire FPGA is ideal for applications across multiple markets leveraging FPGA technology, including JESD204B interfaces, 10Gb Ethernet solutions, imaging/video, machine learning, PCI Express-based designs, control processing, encryption and root of trust, secure wireless communications, aircraft networking, and actuation and control.

Microsemi's PolarFire FPGA enables customers to forego purchasing higher end FPGAs to obtain the Serialiser/Deserialiser (SerDes) performance needed for their designs while offering lower power, mid-range capabilities that offer significant advantages over competing devices in several application areas. The PolarFire family provides a variety of solutions for mid-range and low-density FPGAs as well as complex Programmable Logic Devices (CPLDs).

PolarFire FPGAs also feature a cost-optimised architecture delivering additional benefits, including:

  • Standard Complementary Metal Oxide Semiconductor (CMOS) 28nm process technology
  • Transceiver performance optimised for 12.7Gbps, yielding smaller size and lower power
  • The only low cost, mid-range device offering 1.6Gbps LVDS and 1.6Gbps DDR4 I/O
  • High performance security IP, uniquely offering hardened security IP in a mid-range device
  • Mid-range FPGAs in the smallest packages

The device also offers power optimisation with features including:

  • 28nm flash, yielding very low static power
  • Negligible inrush power
  • Low power modes, including Flash*Freeze, which yields best-in-class standby power
  • Integrated hard IP, offering DDR PHY, PCIe end point/root port and a crypto processor
  • Total power (static and dynamic) of up to 50% lower power

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